In recent years, network traffic has increasingly thickened. Because of development of optical transmission technology, a bottleneck on the network has changed from a transmission line to a switch device and a router device, and demand for a large capacity switch has risen. From economical viewpoints, however, to introduce a large capacity switch from a stage at which traffic is light is an investment in vain. Namely, at an initial stage of business, it suffices that a switch capacity is small. Therefore, a switch having expandability such that the capacity of the switch is small initially but can be increased according to an increase in the number of users, and such that the large capacity switch can be finally constructed is desired.
A multistage switch structure is known as one of methods of expanding a switch capacity. A multistage switch of this type is disclosed in Patent document 1.
The multistage switch disclosed therein is configured to include a plurality of unit switches as shown in FIG. 17. A three stage CLOS (CLOS is an inventor's name) switch, for example, is configured to include three stages of unit switch groups, i.e., an input switch group 13-1, an intermediate switch group 13-2, and an output stage switch group 13-3. The input stage switch group 13-1 is configured to include unit switch groups 13-11-1 to 13-11-k in each of which k m×n unit switches, where k is the number of m×n unit switches, are arranged in parallel. The m×n unit switch has m input lines and n output lines, where m is the number of input lines and n is the number of output lines. The intermediate stage switch group 13-2 is configured to include unit switch groups 13-21-1 to 13-21-n in each of which n k×h unit switches, where n is the number of k×h unit switches, are arranged in parallel. The k×h unit switch has k input lines and h output lines, where k is the number of input lines and h is the number of output lines. The output stage switch group 13-3 is configured to include unit switch groups 13-31-1 to 13-31-h in each of which h n×j unit switches, where h is the number of n×j unit switches, are arranged in parallel. The n×j unit switch has n input lines and j output lines, where n is the number of input lines and j is the number of output lines. The input stage group 13-1 is connected to the intermediate stage switch group 13-2 by a line group 13-13-1 to 13-13-(k×n), and the intermediate stage group 13-2 is connected to the output stage switch group 13-3 by a line group 13-32-1 to 13-32-(n×h), thereby constituting a switching device having a large capacity of mk×jh. In this way, with the multistage switch structure, it is possible to constitute a switch in a scale according to the number of unit switches at each stage and to the number of corresponding links, by using small-capacity unit switches.
Furthermore, various scheduling methods for the switching device have been conventionally proposed. If these scheduling methods are classified according to arrangement of functions, they are roughly divided into a scheduling method by arranging scheduling functions in a distributed fashion and a scheduling method by arranging scheduling function in a centralized fashion. FIGS. 18 and 19 show configurations disclosed in Patent document 2 and 3, respectively. The configurations of FIGS. 18 and 19 show states of conventional arrangement of scheduling functions, respectively. Specifically, FIG. 18 shows the configuration in which scheduling functions are arranged in a distributed fashion whereas FIG. 19 shows the configuration in which scheduling functions are arranged in a centralized fashion.
As shown in FIG. 18, with the configuration in which the scheduling functions are arranged in a distributed fashion, the switching device includes a plurality of switches and schedulers 14-1 to 14-m. By mutually connecting adjacent schedulers, the respective schedulers can transmit and receive scheduling information to and from one another, and carry out all scheduling processings.
As shown in FIG. 19, with the configuration in which the scheduling functions are arranged in a centralized fashion, a scheduler 15 is connected to all switches to provide one control circuit, thereby carrying out all scheduling processings. The centralized scheduler of this type has advantages of small wiring delay and smaller mounting restrictions caused by the wiring delay because of no need to connect a plurality of schedulers to one another. However, if a switching device is a large-scale switch, then circuit scale is made larger to disadvantageously make mounting difficult. Besides, the switching device is inferior in expandability because the number of inputs that can be accommodated is fixed after mounting.
If the switching device excellent in expandability is to be constituted, it is advantageous to use distributed schedulers. However, if the number of schedulers increases, the number of connecting lines for connecting the schedulers to one another increases, thus disadvantageously increasing mounting restrictions. Besides, the number of mounting restrictions also increases due to delay generated by exchange of information. To solve the disadvantages, there is proposed a method of carrying out scheduling processing for which the schedulers are not mutually connected and do not exchange scheduling information with one another.
Patent document 1: JP-A 2002-325087 (FIG. 17)
Patent document 2: JP-A 2002-152267 (FIG. 18)
Patent document 3: JP-A 6-70347 (FIG. 19)